Topic Tree (Ignore Deleted Portions)

Semiconductor Devices
│
├── Semiconductors
│ ├── Intrinsic
│ │ └── Pure Semiconductor
│ ├── Extrinsic
│ │ └── p-type and n-type Semiconductor
│ ├── Valence Band
│ ├── Conduction Band
│ ├── Energy Gap
│ ├── PNP
│ │ └── CE mode
│ └── NPN
│ ├── CB mode
│ └── CC mode
│
├── Transistors
│ (linked from Semiconductor → PNP/NPN structure)
│
├── Junction Diodes
│ ├── PN-Junction Diode
│ │ ├── Potential Barrier and Field
│ │ ├── Depletion Region
│ │ └── Rectifier (Half Wave & Full Wave)
│ │ └── Filter
│ ├── Zener Diode
│ │ ├── I–V Characteristics
│ │ └── Voltage Regulator
│ ├── Photo Diode
│ └── LED
│
└── Logic Gates
├── NAND
├── AND
├── OR
├── NOR
└── NOT

SaitechAI • Electronics Lecture Cards (Compact)

SaitechAI • Electronics Lecture Cards

Energy Bands → Semiconductors → PN Junction → Biasing → Rectifiers

Energy Band Theory

VB • CB • Forbidden gap (E_g)

Concept

In crystals, atomic levels spread into bands.
VB: highest filled, CB: next higher; E_g has no states.
Fermi level E_F: 50% occupancy at equilibrium.

_g Insulator Conduction requires carriers + empty states near E_F

CMP

Conductors vs Semiconductors vs Insulators

σ(T), carriers, E_F

Property	Conductor	Semiconductor	Insulator
Band picture	VB overlaps CB	Small E_g (~0.7–3 eV)	Large E_g (>~5 eV)
Carriers	Electrons	e⁻ & h⁺	Bound
σ vs T	↓ with T	↑ with T	≈0

Why σ↑ with temperature in semiconductors?

Thermal energy generates e⁻–h⁺ pairs (VB→CB), increasing carrier density.

Intrinsic & Extrinsic Semiconductors

Fermi level shift • Majority carriers

Intrinsic: n = p = n_i, E_F ≈ mid-gap; σ = q(nμ_n+pμ_p).
n-type: donors → electrons majority; E_F ↑ toward CB.
p-type: acceptors → holes majority; E_F ↓ toward VB.
Mass action: np=n_i².

_F n-type E_F↑

PN Junction • Equilibrium

Depletion region • V_bi

Diffusion leaves fixed ions → depletion with built-in potential V_bi.
Equilibrium: drift current = diffusion current.

V_bi = (kT/q) ln(N_aN_d/n_i²)

Forward Bias

Diode equation & knee

p→+, n→− lowers barrier, width ↓, large I after threshold.
I = I_s(e^{V_D/(nV_T)} − 1)
V_T≈25.9 mV @ 300 K; n≈1–2.

Reverse Bias

Leakage • Breakdown

p→−, n→+ raises barrier; I ≈ I_s (tiny) till breakdown.
Zener/avalanche at high |V_R|.

HWR

Half-Wave Rectifier

Single diode • High ripple

Average DC: V_dc=V_m/π; Ripple factor ≈1.21; η ≈40.6%; PIV =V_m.

FWR

Full-Wave Rectifier

Bridge • Low ripple

Average DC: V_dc=2V_m/π; Ripple ≈0.482; η ≈81.2%.
PIV: bridge V_m, centre-tap 2V_m.

Quick Practice

Check-your-understanding

Why do insulators show negligible conductivity at room temperature?
In B-doped Si, identify majority/minority carriers.
Write diode I–V equation and define symbols.
Bridge FWR with V_m=12 V → V_dc?
Define PIV; give values for HWR and centre-tap FWR.

Answers

Large E_g, no states near E_F, no free carriers.
p-type: holes majority; electrons minority.
I = I_s(e^{V_D/(nV_T)}−1); I_s: saturation, n: ideality, V_T=kT/q.
V_dc=2V_m/π≈7.64 V.
HWR: V_m; centre-tap FWR: 2V_m.

SUM

One-Page Summary

From bands to rectifiers

Metals: band overlap; Semis: small E_g; Insulators: large E_g.
Doping shifts E_F, sets majority carriers.
PN junction: depletion + V_bi; bias controls barrier/current.
Rectifiers: HWR (simple, high ripple) vs FWR (better DC, lower ripple).

Attribution: SaitechAI

Tag: semiconductors

Semiconductors