Topic Tree (Ignore Deleted Portions)
Semiconductor Devices
│
├── Semiconductors
│ ├── Intrinsic
│ │ └── Pure Semiconductor
│ ├── Extrinsic
│ │ └── p-type and n-type Semiconductor
│ ├── Valence Band
│ ├── Conduction Band
│ ├── Energy Gap
│ ├── PNP
│ │ └── CE mode
│ └── NPN
│ ├── CB mode
│ └── CC mode
│
├── Transistors
│ (linked from Semiconductor → PNP/NPN structure)
│
├── Junction Diodes
│ ├── PN-Junction Diode
│ │ ├── Potential Barrier and Field
│ │ ├── Depletion Region
│ │ └── Rectifier (Half Wave & Full Wave)
│ │ └── Filter
│ ├── Zener Diode
│ │ ├── I–V Characteristics
│ │ └── Voltage Regulator
│ ├── Photo Diode
│ └── LED
│
└── Logic Gates
├── NAND
├── AND
├── OR
├── NOR
└── NOT
SaitechAI • Electronics Lecture Cards
Energy Bands → Semiconductors → PN Junction → Biasing → Rectifiers
EB
Energy Band Theory
VB • CB • Forbidden gap (Eg)
Concept
- In crystals, atomic levels spread into bands.
- VB: highest filled, CB: next higher; Eg has no states.
- Fermi level EF: 50% occupancy at equilibrium.
Conduction requires carriers + empty states near EF
CMP
Conductors vs Semiconductors vs Insulators
σ(T), carriers, EF
| Property | Conductor | Semiconductor | Insulator |
|---|---|---|---|
| Band picture | VB overlaps CB | Small Eg (~0.7–3 eV) | Large Eg (>~5 eV) |
| Carriers | Electrons | e⁻ & h⁺ | Bound |
| σ vs T | ↓ with T | ↑ with T | ≈0 |
Why σ↑ with temperature in semiconductors?
Thermal energy generates e⁻–h⁺ pairs (VB→CB), increasing carrier density.SC
Intrinsic & Extrinsic Semiconductors
Fermi level shift • Majority carriers
- Intrinsic: n = p = ni, EF ≈ mid-gap; σ = q(nμn+pμp).
- n-type: donors → electrons majority; EF ↑ toward CB.
- p-type: acceptors → holes majority; EF ↓ toward VB.
- Mass action: np=ni2.
PN
PN Junction • Equilibrium
Depletion region • Vbi
- Diffusion leaves fixed ions → depletion with built-in potential Vbi.
- Equilibrium: drift current = diffusion current.
Vbi = (kT/q) ln(NaNd/ni2)
FB
Forward Bias
Diode equation & knee
- p→+, n→− lowers barrier, width ↓, large I after threshold.
- I = Is(e^{VD/(nVT)} − 1)
- VT≈25.9 mV @ 300 K; n≈1–2.
RB
Reverse Bias
Leakage • Breakdown
- p→−, n→+ raises barrier; I ≈ Is (tiny) till breakdown.
- Zener/avalanche at high |VR|.
HWR
Half-Wave Rectifier
Single diode • High ripple
- Average DC: Vdc=Vm/π; Ripple factor ≈1.21; η ≈40.6%; PIV =Vm.
FWR
Full-Wave Rectifier
Bridge • Low ripple
- Average DC: Vdc=2Vm/π; Ripple ≈0.482; η ≈81.2%.
- PIV: bridge Vm, centre-tap 2Vm.
QP
Quick Practice
Check-your-understanding
- Why do insulators show negligible conductivity at room temperature?
- In B-doped Si, identify majority/minority carriers.
- Write diode I–V equation and define symbols.
- Bridge FWR with Vm=12 V → Vdc?
- Define PIV; give values for HWR and centre-tap FWR.
Answers
- Large Eg, no states near EF, no free carriers.
- p-type: holes majority; electrons minority.
- I = Is(e^{VD/(nVT)}−1); Is: saturation, n: ideality, VT=kT/q.
- Vdc=2Vm/π≈7.64 V.
- HWR: Vm; centre-tap FWR: 2Vm.
SUM
One-Page Summary
From bands to rectifiers
- Metals: band overlap; Semis: small Eg; Insulators: large Eg.
- Doping shifts EF, sets majority carriers.
- PN junction: depletion + Vbi; bias controls barrier/current.
- Rectifiers: HWR (simple, high ripple) vs FWR (better DC, lower ripple).
Attribution: SaitechAI
